CAD and PPA Methodology Engineer

Qualcomm Technologies, Inc. is seeking a CAD and PPA Methodology Engineer to join their Graphics team. The successful candidate will develop new flows and methodologies to enhance power, performance, and area on GPU cores while collaborating with design and implementation teams.

Responsibilities

• Help develop new flows/methodologies and algorithms to improve power, performance and area (PPA) on state-of-the-art GPU cores
• Collaborate with multiple functional teams including design, technology, power, implementation, sign-off and post-silicon to drive PPA improvements into GPU cores
• Implementation and delivery of GPU cores from RTL to GDSII
• Semi-custom design flow and methodology development
• Identifying areas for flow and process improvements
• Verilog and System-Verilog languages
• RTL synthesis using physically aware tools
• Design constraint management for power, timing, clocking, interfaces
• Formal Verification for RTL-netlist and netlist-netlist checks
• Clock Tree Analysis and Optimization
• ECO methods for functional and timing fixes
• Managing design goals and tradeoffs in power, performance, and area

Skills

• Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience
• OR Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 3+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience
• OR PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience
• Basic understanding of RTL design and ASIC design flow from RTL to GDS such as synthesis, static timing analysis, formal verification, physical design, ECO generation and verification
• Collaboration with multiple functional teams including design, technology, power, implementation, sign-off and post-silicon to drive PPA improvements into GPU cores
• At-least 5-7 years of experience developing methodologies for PPA improvement
• Basic understanding of digital design and RTL development
• Hands on experience with EDA tools such as Synopsys Fusion Compiler, Synopsys RTL-Architect, PrimePower, PrimeTime and Prime Closure
• Script writing experience in UNIX shell, Python, Perl and/or TCL
• Excellent interpersonal and analytical skills as well as ability to work independently
• Highly motivated, excellent team spirit, obsession with deliverable quality and customer oriented

Benefits

• Competitive annual discretionary bonus program
• Opportunity for annual RSU grants
• Highly competitive benefits package

Company Overview

• Qualcomm designs wireless technologies and semiconductors that power connectivity, communication, and smart devices. It was founded in 1985, and is headquartered in San Diego, California, USA, with a workforce of 10001+ employees. Its website is http://www.qualcomm.com.

Company H1B Sponsorship

• Qualcomm has a track record of offering H1B sponsorships, with 2013 in 2025, 1910 in 2024, 3216 in 2023, 2885 in 2022, 2104 in 2021, 1181 in 2020. Please note that this does not guarantee sponsorship for this specific role.